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Forum Post: RE: Code Flash Erase Issue

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The flash_hp erase code runs from RAM, as when the flash is being programmed or erased, the CPU cannot access it for normal code execution or normal data fetch. The Vector table normally resides in flash, starting at address 0 (this can be changed by modifying the Cortex M register VTOR Vector Table Offset register). So, when programming the flash, if the vector table has not been re-located to RAM (and also interrupt routines not in the internal flash that is being programmed or erased), then if an iterrupt occurs, the CPU will try to access the vector table (which it can't), so a erro will occur. So, disabling interrupts is one approach (if you can cope with interrupts being disabled while the flash is being programmed), or you could re-locate the vector table with the VTOR register if you need interrupts while the flash is being programmed (but this will be more involved).

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