Hi Steve, The DTC has slots in its vector table for every interrupt enabled in the system. So you can use DTC for all 4 UARTs if you choose. The overflow error means that characters are coming in when the receive FIFO is full before the receive interrupt is serviced. Did you try raising the SCI RXI interrupt priority to 0 to see if that helps? Also, could you check the value of SF_UART_COMMS_CFG_QUEUE_SIZE_WORDS in synergy_cfg/ssp_cfg/framework/sf_uart_comms_cfg.h? It should be at least 16 to avoid the overflow error you are seeing. The UART driver uses an internal FIFO, and can receive up to 16 bytes at once. If there aren't 16 slots in the receive queue at the framework layer and 16 bytes are received in succession, the framework layer will drop the extra bytes. Kristine
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